I have a simple Makefile test:
hello: hello.o
.SUFFIXES: .c .f90 .o
.f90.o:
pgf90 -c -o $@ $<
.c.o:
cc -c -o $@ $<
You don't need to tell me that having foo.c and foo.f90 in the same directory will create confusion. I would never do this for real. I'm just trying to figure out how Make handles some use cases. So when I just issue the make command, make runs:
pgf90 -c -o hello.o hello.f90
cc hello.o -o hello
And, of course, the cc link fails because cc cannot link the FORTRAN object to the executable. Good. But my question is: I tried everything I can come up with to prevent using the pgf90 command as the first compilation command and instead select the cc command. I changed the order of the suffix rules. I reordered the suffixes in the .SUFFIXES statement. The only thing that seems to work is that the .f90 suffix rule is excluded. Why can this be changed? Thank you (In case this is not necessary, I have the simple source files hello.f90 and hello.c in my directory, and they simply compile and execute.)
UPDATE: Ran make with -d. The corresponding output (AFAICT) is as follows:
Considering target file 'hello.o'.
File 'hello.o' does not exist.
Looking for an implicit rule for 'hello.o'.
Trying pattern rule with stem 'hello'.
Trying implicit prerequisite 'hello.c'.
" " hello.c ", ,
Found an implicit rule for 'hello.o'.
Considering target file 'hello.f90'.
Looking for an implicit rule with stem 'hello.f90'
.
.
.
No implicit rule found for 'hello.f90'. #???????
.
.
Must remake target 'hello.o'
pgf90 -c -o hello.o hello.f90