Why does “DIV EDX” in MASM always throw a processor exception?

I have this question in my exam on computer architecture in computer science last semester: "Why does" DIV EDX "in MASM always throw a processor exception?"
What is the mechanism that throws an exception?

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When you perform 1-operand splitting on x86 processors, EDX: EAX (64 bit) is divided by the 1st operand (32 bit). The result is stored in EAX (32 bits).

, EDX: EAX EDX, (EDX * 0x100000000 + EAX)/EDX, 0x100000000 . .

. ( Intel ).

, (MASM), .

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