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The relationship between SSE vectorization and memory alignment

Why do we need aligned memory for SSE / AVX?

One answer that I often get is loading with aligned memory is much faster than unchanged memory loading. Then, why is this aligned memory load much faster than uneven memory loading?

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This is not just specific to SSE (or even x86). On most architectures, the loads and storages must be naturally aligned, otherwise they either (a) throw an exception, or (b) need two or more loops plus some fixes to transparently handle the inconsistent load / storages. In x86 (b), true for data types <16 bytes, but (a) true for SSE data types, unless you explicitly use inconsistent versions of load / store instructions that can handle invalid data.

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