I am trying to implement AES-256 in CTR mode using nVidia CUDA. I have successfully encoded the processor code for the key extension, and now I need to implement the actual AES-256 algorithm. According to Wikipedia, some of the codes that I saw, and especially this PDF (page 9), AES rounds can be implemented as a series of table lookups. My question is: how can I generate these tables? I know that I need 4 KB to store these tables, and that is not a problem. I tried all day to find these tables without success. In the PDF, I posted a link to mention the lookup tables T0, T1, T2, and T3, but I don't know what it is. It also mentions round keys 4, 5, 6, and 7, but I also don’t understand what these indexes are about.
The closest I came to the conclusion was how to generate these lookup tables from this project . Inside the code there is a comment that states:
Te0[x] = S [x].[02, 01, 01, 03];
Te1[x] = S [x].[03, 02, 01, 01];
Te2[x] = S [x].[01, 03, 02, 01];
Te3[x] = S [x].[01, 01, 03, 02];
However, I'm not quite sure that I know what this notation means (is it matrix multiplication or something else?). The only thing I learn is the constant matrix of the mix-column part of the column, as well as the S-box matrix.
[Edit] Now that someone has pointed this out - how can a search implementation be slower? Would it be prudent to implement AES without lookup tables here?