How do you cause 32 bit floating point error

From Assembly Art, FPU Management Register

Bits from zero to five are exception masks. They are similar to the interrupt enable bit in the 80x86 flag register. If these bits contain one, the corresponding condition is ignored by the 80x87 FPU. However, if any bit contains zero, and the corresponding condition occurs, then the FPU immediately generates an interrupt so that the program can handle the degenerate condition.

, 6 lsbs, . , , .

int main()
{
    int cw=0;
    asm("fstcw (%0)\n\t"::"r"(&cw):"memory"); cw &= ~0x3f;
    asm("fldcw (%0)\n\t"::"r"(&cw):"memory");
    asm("fldz");  // divide 1 by 0.0 
    asm("fld1");  // or just omit these two loads if you have 387+ :)
    asm("fdivp");
    asm("wait");  // This is mandatory
    return 0;
}

x64/i5/gcc 4.6/ubuntu