Definition of the rightrotate function with fixed rotation length

I need Verilog's rightrotate function for 32-bit inputs since it is not defined as an operator (x →> y).

It is easy to edit such input manually:

wire [31:0] test = 32'd12345; 
wire [31:0] rotated_1 = {test[0:0],test[31:1]};
wire [31:0] rotated_3 = {test[2:0],test[31:3]};

The output of the test bench corresponds to the expected:

original: 00000000000000000011000000111001
rotate_1: 10000000000000000001100000011100
rotate_3: 00100000000000000000011000000111

We see that the rotate (inp, x) function should work as follows:

function rotate;
   input [31:0] inp; 
   input [4:0]  x;
   begin 
      rotate = {inp[x-1:0],inp[31:x]};
   end
endfunction

The problem is that x is not a constant , so it does not compile. To specify a range using [a: b], a and b must be constants.

The solution apparently uses the parameters:

function rotate;
   parameter integer x = 1;
   input [31:0] inp;
   begin
      rotate = {inp[x-1:0],inp[31:x]};
   end
endfunction

Well, it compiles, but unlike modules that you can create with a modified parameter, such as

param_module #(3) pm_inst(...);

. , Verilog, , :

<function_call>
::= <name_of_function> ( <expression> <,<expression>>* )

defparam , .

Verilog, , rotate ? - : - (

( , :)

function rotate1...
function rotate2...
function rotate3...
...
+3
2

, :

function [31:0] rotate (input [31:0] data, input [4:0] shift);
reg [63:0] tmp;
begin
  tmp = {data, data} >> shift;
  rotate = tmp[31:0];
end
endfunction
+5

!

MUX 0-31 , x .

. 2-1 32- MUXes , 16, 8, 4, 2, 1 ( 0, 1, 2, 3, 4) .

0

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